Seoul moves to label advanced chip packaging as strategic tech, aims to boost tax credits as HBM4 nears

South Korea’s industry ministry is preparing to classify advanced semiconductor packaging as national strategic technology, according to a draft policy summary shared with chipmakers on Wednesday in Seoul. The change would make investments in 2.5D and 3D packaging eligible for top tier tax credits under the K-Chips framework, and would fast track permits for new lines as suppliers gear up for HBM4 shipments in 2026.

The move matters because packaging remains a choke point for AI accelerators that pair GPUs with stacked high bandwidth memory. Korean press including ETNews and Maeil Business reported that Nvidia and AMD have pushed suppliers to add second source capacity beyond TSMC’s CoWoS, which has constrained deliveries since 2023.

What Seoul is proposing The draft extends strategic tech status to silicon interposers, redistribution layers, hybrid bonding, and high density through silicon via processes, according to the summary seen by industry groups. Large companies would receive the highest investment tax credits available under K-Chips, along with accelerated depreciation and priority access to utilities for qualified projects.

Officials are also weighing matching grants for university consortia that focus on packaging design and reliability, people familiar with the discussions said. The package aligns with existing plans to expand the Yongin and Pyeongtaek semiconductor zones, where suppliers can colocate memory, logic, and back end lines.

Industry timing and global context SK Hynix has told investors it targets HBM4 mass production in 2026 and is expanding HBM assembly and test in Cheongju and Icheon after ramping HBM3E in 2024 and 2025. Samsung is pitching its I-Cube and H-Cube packaging to GPU vendors and has added advanced packaging R&D capacity alongside its Giheung and Cheonan sites.

TSMC is expanding CoWoS in Taiwan, but demand from Nvidia and hyperscalers keeps capacity tight. Suppliers say newer accelerators require more HBM stacks and higher stack heights, which raises packaging complexity and cost, and makes incentives decisive for where new lines are built.

Regulatory spillovers are in view. Korean memory makers still depend on waivers to service Chinese facilities under United States export controls, so shifting more packaging to domestic sites reduces cross border risk. Any new Korean capacity that becomes integral to AI GPUs will also figure into future control regimes that increasingly target complete accelerator modules, not only standalone chips.

For global buyers of AI servers, a Korean push into strategic packaging would add redundancy to a supply chain dominated by a single foundry, shorten lead times if it succeeds, and give Nvidia and AMD credible alternatives for integrating next generation HBM with compute dies.