Japan moves to curb exports of advanced chip packaging tools, targeting hybrid bonding and HBM stack capacity
Kai Tanaka ·

Japan’s Ministry of Economy, Trade and Industry on Wednesday released a draft expansion of its semiconductor export controls that for the first time covers advanced packaging equipment, including hybrid bonding tools used to stack high bandwidth memory. The proposal, posted for public comment through mid November, would require licenses for shipments to China and several other jurisdictions and is slated to take effect in early 2027.
The move closes gaps left by Japan’s 2023 controls on front end tools and aligns Tokyo more closely with Washington’s push to slow China’s access to AI hardware building blocks. It matters now because HBM stacking and 2.5D or 3D integration have become the bottleneck for GPUs and accelerators, and Chinese firms have been accelerating investments in domestic packaging lines.
What Japan plans to restrict METI’s draft adds die to wafer and wafer to wafer hybrid bonding systems with fine alignment, thermal compression bonding platforms, wafer thinning and dicing grinders, and process tools for through silicon vias such as deep reactive ion etchers and copper plating systems to the controlled list under the Foreign Exchange and Foreign Trade Act. The document names performance thresholds for alignment accuracy and process parameters, mirroring how Japan structured its 2023 lithography and etch restrictions.
Companies likely affected include Tokyo Electron for etch and deposition, Disco for thinning and dicing, Towa for molding and bonding, SCREEN Holdings for wet process, and Shibaura Mechatronics for plating and cleaning. Chinese buyers would include OSATs such as JCET, Tongfu Microelectronics, and Huatian, as well as memory and logic firms adding advanced packaging capacity for AI parts.
Why it matters for AI supply chains China has been the largest destination for Japanese chip equipment shipments since 2023 according to Japan’s Ministry of Finance trade data, and packaging tools have remained permissive compared with leading edge lithography. Analysts at SMBC Nikko and Nomura have flagged hybrid bonding as a choke point for HBM4 era stacks, and note that Dutch supplier Besi dominates that niche. Tokyo’s move will likely be coordinated with The Hague’s next update, which Dutch media have reported is under review.
Korean and Taiwanese firms with packaging sites outside China, including SK Hynix in Korea and Vietnam and TSMC in Taiwan and Japan, could benefit from tighter Chinese access. Southeast Asian OSATs in Malaysia and Singapore may also see more orders as accelerator makers diversify bonding and test capacity.
For the global tech landscape, this is another sign that export controls are moving beyond front end wafer fabs to the packaging steps that define performance and power for AI chips. Supply chain resilience will hinge on where HBM stacking and heterogeneous integration can legally occur, not only where wafers are made.